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Data Sheet March 1997
L7554 Low-Power SLIC
Features
s
Description
This electronic subscriber loop interface circuit (SLIC) is optimized for low-power consumption while providing an extensive set of features. Quiet polarity reversal is possible because the ac path is uninterrupted during transition. The L7554 includes the ground start state and a summing node for meter pulse injection to 2.2 Vrms. A spare, uncommitted op amp is included for meter pulse filtering. The device is being offered in two versions, based upon maximum battery. The L7554AP is guaranteed to -60 V, and the L7554BP is guaranteed to -72 V. The device is available in a 44-pin PLCC package. It is built by using a 90 V complementary bipolar (CBIC) process.
Low active power (typical 165 mW during on-hook transmission) Sleep state for low idle power (76 mW) Quiet Tip/Ring polarity reversal Supports meter pulse injection Spare op amp for meter pulse filtering -24 V to -72 V power supply operation Distortion-free on-hook transmission Convenient operating states: -- Forward powerup -- Polarity reversal powerup -- Forward low-power scan -- Polarity reversal low-power scan -- Ground start -- Disconnect (high impedance) Adjustable supervision functions: -- Off-hook detector with longitudinal rejection -- Ground key detector -- Ring trip detector Independent, adjustable, dc and ac parameters: -- dc feed resistance -- Loop current limit -- Termination impedance Thermal protection
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L7554 Low-Power SLIC
Data Sheet March 1997
Table of Contents
Content Page
Features .................................................................................................................................................................. 1 Description ............................................................................................................................................................... 1 Pin Information ......................................................................................................................................................... 4 Functional Description .............................................................................................................................................. 6 Absolute Maximum Ratings ..................................................................................................................................... 6 Recommended Operating Conditions ..................................................................................................................... 7 Electrical Characteristics ......................................................................................................................................... 7 Ring Trip Requirements ..................................................................................................................................... 11 Test Configurations ............................................................................................................................................... 12 Applications ........................................................................................................................................................... 14 Design Considerations ....................................................................................................................................... 16 Characteristic Curves......................................................................................................................................... 17 dc Applications ................................................................................................................................................... 20 Battery Feed.................................................................................................................................................... 20 Overhead Voltage .......................................................................................................................................... 20 Adjusting Overhead Voltage ........................................................................................................................... 21 Adjusting dc Feed Resistance......................................................................................................................... 22 Adjusting Overhead Voltage and dc Feed Resistance Simultaneously .......................................................... 22 Loop Range..................................................................................................................................................... 22 Off-Hook Detection ......................................................................................................................................... 22 Ring Trip Detection......................................................................................................................................... 23 Ring Ground Detection................................................................................................................................... 23 ac Design ........................................................................................................................................................... 24 First-Generation Codecs.................................................................................................................................. 24 Second-Generation Codecs ............................................................................................................................ 24 Third-Generation Codecs ................................................................................................................................ 24 Selection Criteria ............................................................................................................................................. 24 PCB Layout Information ......................................................................................................................................... 26 Outline Diagram...................................................................................................................................................... 27 44-Pin PLCC ....................................................................................................................................................... 27 Ordering Information ........................................................................................................................................... 28
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Lucent Technologies Inc.
Data Sheet March 1997
L7554 Low-Power SLIC
Description (continued)
BGND AGND IPROG VREG VBAT CF1 CF2 FB1 VCC FB2
POWER CONDITIONING & REFERENCE
RECTIFIER
3
DCOUT
-
-1 V/24 mA
VTX
TXI 0.1 F CEXTERNAL
9.6
VITR
+
SN PT A=4
SPARE OP AMP
-
XMT
+
-
PR A = -4 1
RCVN RCVP
+
DCR
dc RESISTANCE ADJUST BATTERY FEED STATE CONTROL
B0 B1 B2
LCTH
LOOP CLOSURE DETECTOR
+
NLC
-
RTSP RTSN RING TRIP DETECTOR
+
NRDET
-
RGDET
ICM
RING GROUND DETECTOR
12-2569 (C)
Figure 1. Functional Diagram
Lucent Technologies Inc.
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L7554 Low-Power SLIC
Data Sheet March 1997
Pin Information
IPROG FB2
6 7 VCC RCVP RCVN TXI LCTH VREG DCOUT VBAT PR 8 9 10 11 12 13 14 15 16 17 18
CF2
5
4
3
2
1
44
43
42
41
40 39 38 37 36 35 FB1 SN XMT B1 B2 NLC NRDET RTSP RTSN PT VTX
L7554
34 33 32 31 30 29
19
CF1
20
VITR
21
ICM
22
RGDET
23
B0
24
AGND
25
AGND
26
DCR
27
BGND
28
12-2571 (C)
Figure 2. Pin Diagram (PLCC Chip) Table 1. Pin Descriptions Pin 3 8 9 10 11 12 13 14 15 16 18 19 Symbol Type IPROG VCC RCVP RCVN TXI LCTH VREG DCOUT VBAT PR CF2 CF1 I -- I I -- I I O -- I/O -- -- Description Current-Limit Program Input. A resistor to DCOUT sets the dc current limit of the device. +5 V Power Supply. Receive ac Signal Input (Noninverting). This high-impedance input controls the ac differential voltage on Tip and Ring. Receive ac Signal Input (Inverting). This high-impedance input controls the ac differential voltage on Tip and Ring. ac/dc Separation. Connect a 0.1 F capacitor from this pin to VTX. Loop Closure Threshold Input. Connect a resistor to DCOUT to set off-hook threshold. Regulated Negative dc Battery Voltage. Can be connected to an external regulator. Otherwise, connect to VBAT. dc Output Voltage. This output is a voltage that is directly proportional to the absolute value of the differential Tip/Ring current. Battery Supply. Negative high-voltage power supply. Protected Ring. The output of the ring driver amplifier and input to loop sensing circuitry. Connect to loop through overvoltage protection. Filter Capacitor 2. Connect a 0.1 F capacitor from this pin to AGND. Filter Capacitor 1. Connect a 0.47 F capacitor from this pin to pin CF2.
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Lucent Technologies Inc.
Data Sheet March 1997
L7554 Low-Power SLIC
Pin Information (continued)
Table 1. Pin Descriptions (continued) Pin Symbol Type 20 21 VITR ICM O I Description Transmit ac Output Voltage. This output is a voltage that is directly proportional to the differential ac Tip/Ring current. Common-Mode Current Sense. To program ring ground sense threshold, connect a resistor to VCC and connect a capacitor to AGND to filter 50/60 Hz. If unused, the pin can be left unconnected. Ring Ground Detect. When high, this open-collector output indicates the presence of a ring ground. To use, connect a 100 k resistor to VCC. State Control Input. B0, B1, and B2 determine the state of the SLIC. See Table 2. Analog Signal Ground. Analog Signal Ground. dc Resistance for Low Loop Currents. Leave open for dc feed resistance of 118 , or short to DCOUT for 618 . Intermediate values can be set by a simple resistor divider from DCOUT to ground with the tap at DCR. Battery Ground. Ground return for the battery supply. This output is a voltage that is directly proportional to the differential Tip/Ring current. Protected Tip. The output of the tip driver amplifier and input to loop sensing. Connect to loop through overvoltage protection. Ring Trip Sense Negative. Connect this pin to the ringing generator signal through a high-value resistor. Ring Trip Sense Positive. Connect this pin to the ring relay and the ringer series resistor through a high-value resistor. Ring Trip Detector Output. When low, this logic output indicates that ringing is tripped. Loop Detector Output. When low, this logic output indicates an off-hook condition. State Control Input. B0, B1, and B2 determine the state of the SLIC. See Table 2. State Control Input. B0, B1, and B2 determine the state of the SLIC. See Table 2. Transmit ac Output Voltage. The output of the uncommitted operational amplifier. Summing Node. The inverting input of the uncommitted operational amplifier. A resistor or network to XMT sets the gain. Forward Battery Slowdown. A 0.1 F capacitor from FB1 to AGND and from FB2 to AGND will ramp the polarity reversal transition for added flexibility in applications requiring quiet polarity reversal. If not needed, the pin can be left open. Forward Battery Slowdown. A 0.1 F capacitor from FB2 to AGND and from FB1 to AGND will ramp the polarity reversal transition for added flexibility in applications requiring quiet polarity reversal. If not needed, the pin can be left open.
22 23 24 25 26
RGDET B0 AGND AGND DCR
O I -- -- I
27 29 30 31 32 33 34 35 36 37 38 39
BGND VTX PT RTSN RTSP NRDET NLC B2 B1 XMT SN FB1
-- O I/O I I O O I I/O O I I
40
FB2
I
Lucent Technologies Inc.
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L7554 Low-Power SLIC
Data Sheet March 1997
Functional Description
Table 2. Input State Coding B0 1 1 0 B1 1 1 1 B2 1 0 1 State/Definition Powerup, Forward Battery. Normal talk and battery feed state. Pin PT is positive with respect to PR. On-hook transmission is enabled. Powerup, Reverse Battery. Normal talk and battery feed state. Pin PR is positive with respect to PT. On-hook transmission is enabled. Ground Start. Tip drive amplifier is turned off. The device presents a high-impedance (>100 k) to the PT pin and a current-limited battery to the PR pin. Output pin RGDET indicates current flowing in the ring lead. Low-Power Scan, Reverse Battery. Except for off-hook supervision, all circuits are shut down to conserve power. Pin PR is positive with respect to PT. On-hook transmission is disabled. Low-Power Scan, Forward Battery. Except for off-hook supervision, all circuits are shut down to conserve power. Pin PT is positive with respect to PR. On-hook transmission is disabled. Disconnect. The Tip and Ring amplifiers are turned off and the SLIC goes to a high-impedance state (>100 k).
0 0 0
1 0 0
0 1 0
Table 3. Supervision Coding Pin NLC 0 = off-hook 1 = on-hook Pin NRDET 0 = ring trip 1 = no ring trip Pin RGDET 1 = ring ground 0 = no ring ground
Absolute Maximum Ratings (TA = 25 C)
Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess of those given in the operational sections of the data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect device reliability. Parameter 5 V Power Supply Battery (Talking) Supply Logic Input Voltage Analog Input Voltage Maximum Junction Temperature Storage Temperature Range Relative Humidity Range Ground Potential Difference (BGND to AGND) PT or PR Fault Voltage (dc) PT or PR Fault Voltage (10 x 1000 s) Current into Ring Trip Inputs Symbol VCC VBAT -- -- TJ Tstg RH -- VPT, VPR VPT, VPR IRTSP, IRTSN Value 7.0 -75 -0.5 to +7.0 -7.0 to +7.0 165 -40 to +125 5 to 95 3 (VBAT - 5) to +3 (VBAT - 15) to +15 240 Unit V V V V C C % V V V A
Note: The IC can be damaged unless all ground connections are applied before, and removed after, all other connections. Furthermore, when powering the device, the user must guarantee that no external potential creates a voltage on any pin of the device that exceeds the device ratings. Some of the known examples of conditions that cause such potentials during powerup are the following: 1) an inductor connected to Tip and Ring can force an overvoltage on VBAT through the protection devices if the VBAT connection chatters, and 2) inductance in the VBAT lead could resonate with the VBAT filter capacitor to cause a destructive overvoltage.
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Data Sheet March 1997
L7554 Low-Power SLIC
Recommended Operating Conditions
Parameter Ambient Temperature VCC Supply Voltage VBAT Supply Voltage: L7554AP L7554BP Loop Closure Threshold-detection Programming Range dc Loop Current-limit Programming Range On- and Off-hook 2-wire Signal Level ac Termination Impedance Programming Range Min -40 4.75 -24 -24 -- 5 -- 150 Typ -- 5.0 -40 -48 10 40 1 600 Max 85 5.25 -60 -72 ILIM 45 2.2 1300 Unit C V V V mA mA Vrms
Electrical Characteristics
Minimum and maximum values are testing requirements. Typical values are characteristic of the device and are the result of engineering evaluations. Typical values are for information purposes only and are not part of the testing requirements. Minimum and maximum values apply across the entire temperature range (-40 C to +85 C) and the entire battery range unless otherwise specified. Typical is defined as 25 C, VCC = 5.0 V, VBAT = -48 V, and ILIM = 40 mA. Positive currents flow into the device. Test circuit is Figure 4 unless noted. Table 4. Power Supply Parameter Power Supply--Powerup, No Loop Current ICC IBAT (VBAT = -48 V) Power Dissipation (VBAT = -48 V) Power Supply--Low-Power Scan, Forward Bat, No Loop Current ICC IBAT (VBAT = -48 V) Power Dissipation (VBAT = -48 V) Power Supply Rejection 500 Hz to 3 kHz (See Figures 5, 6, 15, and 16.)1 VCC VBAT Thermal Protection Shutdown (Tjc) Thermal Resistance, Junction to Ambient (JA) Min -- -- -- Typ 4.1 -3.0 165 Max 4.8 -3.5 191 Unit mA mA mW
-- -- --
2.7 -1.4 82
3.7 -1.7 100
mA mA mW
35 45 -- --
-- -- 175 47
-- -- -- --
dB dB C C/W
1. This parameter is not tested in production. It is guaranteed by design and device characterization.
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L7554 Low-Power SLIC
Data Sheet March 1997
Electrical Characteristics (continued)
Table 5. 2-Wire Port Parameter Tip or Ring Drive Current = dc + Longitudinal + Signal Currents Signal Current Longitudinal Current Capability per Wire1 dc Loop Current Limit2 RLOOP = 100 Programmability Range Accuracy (20 mA < ILIM < 40 mA) Powerup Open Loop Voltage Levels Common-mode Voltage Differential Voltage: VBAT = -48 V, Temperature = 25 C VBAT = -72 V, Temperature = 85 C (L7554BP) Disconnect State PT Resistance (VBAT < VPT < 0 V) PR Resistance (VBAT < VPR < 0 V) Ground Start State PT Resistance dc Feed Resistance (for ILOOP below regulation level) Loop Resistance Range (-3.17 dBm overload into 600 ; not including protection) ILOOP = 20 mA at VBAT = -48 V ILOOP = 20 mA at VBAT = -24 V Longitudinal to Metallic Balance--IEEE 3 Std. 455 (See Figure 7.)4 50 Hz to 1 kHz 1 kHz to 3 kHz Metallic to Longitudinal Balance 200 Hz to 4 kHz RFI Rejection (See Figure 0.5 Vrms, 50 Source, 30% AM Mod. 1 kHz 500 kHz to 100 MHz 8.)5 Min 65 15 8.5 -- 5 -- -- |VBAT + 7.0| |VBAT + 10.0| 100 100 100 90 Typ -- -- 15 ILIM -- -- VBAT/2 |VBAT + 6.5| |VBAT + 6.8| 143 133 143 113 Max -- -- -- -- 45 12 -- |VBAT + 6.0| -- -- -- -- 133 Unit mA mArms mArms mA mA % V V V k k k
1900 700
-- --
-- --

64 60 46
75 70 --
-- -- --
dB dB dB
--
-55
-45
dBV
1. The longitudinal current is independent of dc loop current. 2. Current-limit ILIM is programmed by a resistor, RPROG, from pin IPROG to DCOUT. ILIM is specified at the loop resistance where current limiting begins (see Figure 25). Select RPROG (k) = 1.67 x ILIM (mA). 3. IEEE is a registered trademark of The Institute of Electrical and Electronics Engineers, Inc. 4. Longitudinal balance of circuit card will depend on loop series resistance matching (see Figures 23 and 24). 5. This parameter is not tested in production. It is guaranteed by design and device characterization.
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Lucent Technologies Inc.
Data Sheet March 1997
L7554 Low-Power SLIC
Electrical Characteristics (continued)
Table 6. Analog Pin Characteristics Parameter Differential PT/PR Current Sense (DCOUT) Gain (PT/PR to DCOUT) Offset Voltage @ ILOOP = 0, VBAT = -48 V Loop Closure Detector Threshold1 Programming Accuracy Ring Ground Detector Threshold2 RICM = 83 k Programming Accuracy Ring Trip Comparator Input Offset Voltage RCVN, RCVP Input Bias Current Min -119 -200 -- 3 -- -- -- Typ -125 -- -- 6 -- -- -0.2 Max -127 200 20 10 25 10 -1 Unit V/A mV % k % mV A
1. Loop closure threshold is programmed by resistor RLCTH from pin LCTH to pin DCOUT. 2. Ring ground threshold is programmed by resistor RICM2 from pin ICM to VCC.
Table 7. Uncommitted Op Amp Characteristics Parameter Input Offset Voltage Input Offset Current Input Bias Current Differential Input Resistance Output Voltage Swing (RL = 10 k) Output Resistance (AVCL = 1) Small Signal GBW Min -- -- -- -- -- -- -- Typ 5 10 200 1.5 3.5 2.0 700 Max -- -- -- -- -- -- -- Unit mV nA nA M Vpk kHz
Lucent Technologies Inc.
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L7554 Low-Power SLIC
Data Sheet March 1997
Electrical Characteristics (continued)
Table 8. ac Feed Characteristics Parameter ac Termination Longitudinal Impedance1 Min 150 -- -- -- -- -0.15 -0.22 -- -- -0.18 -0.25 Typ -- 40 -- -- -400 0 0 8.00 -8.00 0 0 Max 1300 46 0.3 1.0 -- 0.15 0.22 -- -- 0.18 0.25 Unit % % V/A dB dB - - dB dB
Impedance2
Total Harmonic Distortion--200 Hz to 4 kHz2 Off-hook On-hook Transmit Gain, f = 1 kHz (PT/PR to VITR) Transmit Accuracy in dB, 25 C Transmit Accuracy in dB, Full Temperature Range Receive + Gain, f = 1 kHz (RCVP to PT/PR) Receive - Gain, f = 1 kHz (RCVN to PT/PR) Receive Accuracy in dB, 25 C Receive Accuracy in dB, Full Temperature Range Gain vs. Frequency (transmit and receive) (600 termination; reference 1 kHz2 ) 200 Hz to 300 Hz 300 Hz to 3.4 kHz 3.4 kHz to 16 kHz 16 kHz to 266 kHz Gain vs. Level (transmit and receive)(reference 0 dBV2) -50 dB to +3 dB Return 200 Hz to 500 Hz 500 Hz to 3400 Hz 2-wire Idle-channel Noise (600 termination) Psophometric C-message 3 kHz Flat Transmit Idle-channel Noise Psophometric C-message 3 kHz flat Transhybrid Loss3 200 Hz to 500 Hz 500 Hz to 3400 Hz Loss3
-1.00 -0.3 -0.5 -- -0.05 20 26 -- -- -- -- -- -- 21 26
0.0 0.0 -0.1 -- 0 24 29 -87 2 10 -82 7 15 24 29
0.05 0.05 0.3 2.0 0.05 -- -- -77 12 20 -77 12 20 -- --
dB dB dB dB dB dB dB dBmp dBrnC dBrn dBmp dBrnC dBrn dB dB
1. Set by external components. Any complex impedance R1 + R2 || C between 150 and 1300 can be synthesized. 2. This parameter is not tested in production. It is guaranteed by design and device characterization. 3. Return loss and transhybrid loss are functions of device gain accuracies and the external hybrid circuit. Guaranteed performance assumes 1% tolerance of external components.
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Lucent Technologies Inc.
Data Sheet March 1997
L7554 Low-Power SLIC
Electrical Characteristics (continued)
Table 9. Logic Inputs and Outputs All outputs except RGDET are open-collector with internal pull-up resistor. RGDET is open-collector without internal pull-up. Parameter Input Voltages Low Level (permissible range) High Level (permissible range) Input Currents Low Level (VCC = 5.25 V, VI = 0.4 V) High Level (VCC = 5.25 V, VI = 2.4 V) Output Voltages (open-collector with internal pull-up resistor) Low Level (VCC = 4.75 V, IOL = 360 A) High Level (VCC = 4.75 V, IOH = -20 A) Symbol VIL VIH IIL IIH Min -0.5 2.0 -- -- Typ 0.4 2.4 -115 -60 Max 0.7 VCC -200 -100 Unit V V A A
VOL VOH
0 2.4
0.2 --
0.4 VCC
V V
Ring Trip Requirements
200
s
Ringing signal: -- Voltage, minimum 35 Vrms, maximum 100 Vrms. -- Frequency, 17 Hz to 23 Hz. -- Crest factor, 1.4 to 2. Ringing trip: -- 100 ms (typical), 250 ms (VBAT = -33 V, loop length = 530 ). Pretrip: -- The circuits in Figure 3 will not cause ringing trip.
TIP SWITCH CLOSES < 12 ms 6 F TIP 10 k
RING
s
RING
s
2 F TIP
100 RING
12-2572 (C)
Figure 3. Ring Trip Circuits
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L7554 Low-Power SLIC
Data Sheet March 1997
Test Configurations
VBAT
0.1 F
VCC
0.1 F
VREG VBAT 100 PT
BGND VCC
AGND VTR 20 k SN
RLOOP
20 k
L7554 SLIC
100 PR DCOUT
XMT XMT 65 k RCVN 10 k RCVP 26 k RCV
68.1 k IPROG B0 B1 24.9 k LCTH B2 NLC NRDET RGDET RTSP CF1 RTSN ICM VTX TXI 0.1 F CF2 FB2 FB1 0.1 F 0.1 F
12-2570 (C)
Figure 4. L7554 Basic Test Circuit
VBAT OR VCC 100 4.7 F DISCONNECT BYPASS CAP
100 4.7 F DISCONNECT BYPASS CAP VBAT OR VCC
VS VBAT OR VCC TP
67.5 10 F PT
VS VBAT OR VCC
+
900 VT/R BASIC TEST CIRCUIT PR
-
BASIC TEST CIRCUIT
+
VM
67.5 56.3 10 F
PR
-
VS PSRR = 20 log --------VT/R
12-2335.a (C)
VS PSRR = 20 log -----VM
12-2336.a (C)
Figure 5. Metallic PSRR
Figure 6. Longitudinal PSRR Lucent Technologies Inc.
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Data Sheet March 1997
L7554 Low-Power SLIC
Test Configurations (continued)
ILONG
100 F PT VS 368 368 +
VPT
PT
+
VM BASIC TEST CIRCUIT PR
ILONG
- -
VPR
BASIC TEST CIRCUIT
-
100 F
+
PR
VS LONGITUDINAL BALANCE = 20 log -----VM
12-2584 (C)
ZLONG =
VPR VPT OR ILONG ILONG
12-2585 (C)
Figure 7. Longitudinal Balance
Figure 9. Longitudinal Impedance
0.01 F 50 600
82.5
1 6,7
PT
2
LB1201
4
PT
BASIC TEST CIRCUIT PR
XMT BASIC TEST CIRCUIT
VS 0.01 F
2.15 F 82.5
VBAT
+
600 VT/R
-
PR
RCV VS
HP4935A TIMS VS = 0.5 Vrms 30% AM 1 kHz MODULATION, f = 500 kHz--1 MHz DEVICE IN POWERUP MODE, 600 TERMINATION
12-2586 (C)
VXMT GXMT = VT/R GRCV = VT/R VRCV
12-2587 (C)
Figure 8. RFI Rejection Figure 10. ac Gains
Lucent Technologies Inc.
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L7554 Low-Power SLIC
Data Sheet March 1997
Applications
VBAT CBAT 0.1 F RPROG 66.8 k RLCTH 24.9 k VCC 0.1 F CCC 3 IPROG 14 DCOUT 12 LCTH 8 VCC 15 VBAT
VREG VTX 29 CB2 0.1 F RT2 18.7 k RHB1 28.0 k RRCV 48.7 k RGP 20.0 k CGP 330 pF CONTROL INPUTS RX 28.0 k
VFXIN
TXI 11 20
GSX
VITR
-
VFXIP
RT1 86.6 k TIP RPT 20 250 V PROT L7581 RELAY 30 PT
+
DX
PCM HIGHWAY
PWROP DR FSX FSR MC PD CLKSEL A/
L7554 SLIC
RCVP RCVN
9 10
PWRON GSR
SYNCH AND CLOCK
RING RPR 20 RTS1 402
16 RTSP 2.0 M 32 CRTS2 0.27 F RTS2 274 k CRTS1 0.022 F
PR RTSP
B2 35 B1 36 B0 23
CONTROL INPUTS
NLC 34 SUPERVISION OUTPUTS NRDET 33
T7513 CODEC
31 RTSN RTSN 2.0 M CF2 18 CF1 19 CF1 0.47 F AGND AGND BGND 25 24 27
VRING
VBAT
CF2 0.1 F
12-2573 (C)
Figure 11. Basic Loop Start Application Circuit Using T7513 Type Codec
VCC
LOOP START APPLICATION CIRCUIT
RGDET
22
RGDET 100 k
ICM
21
82.5 k RICM2
0.47 F CICM
12-2821 (C)
Figure 12. Ground Start Application Circuit
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Lucent Technologies Inc.
Data Sheet March 1997
L7554 Low-Power SLIC
Applications (continued)
Table 10. Parts List for Loop Start and Ground Start Applications Name Integrated Circuits SLIC Protector Ringing Relay Codec Overvoltage Protection RPT RPR Power Supply CBAT1 CCC CF1 CF2 dc Profile RPROG ac Characteristics CB2 CGB RT1 RRCV RGP CGP RT2 RX RHB1 Supervision RLCTH RTS1 RTS2 CRTS1 CRTS2 RTSN RTSP Ground Start CICM RGDET RICM2 Value L7554 250 V Thyristor type L7581 T7513 20 , Fusible 20 , Fusible 0.1 F, 20%, 100 V 0.1 F, 20%, 10 V 0.47 F, 20%, 100 V 0.1 F, 20%, 100 V 66.8 k, 1%, 1/4 W 0.1 F, 20%, 100 V 330 F, 20%, 10 V 86.6 k, 1%, 1/4 W 48.7 k, 1%, 1/4 W 20.0 k, 1%, 1/4 W 330 pF, 10 V, 20% 18.7 k, 1%, 1/4 W 28.0 k, 1%, 1/4 W 28.0 k, 1%, 1/4 W 24.9 k, 1%, 1/4 W 402 , 5%, 2 W 274 k, 5%, 1/4 W 0.022 F, 20%, 5 V 0.27 F, 20%, 100 V 2 M, 5%, 1/4 W 2 M, 5%, 1/4 W 0.47 F, 20%, 10 V 100 k, 20%, 1/4 W 82.5 k, 1%, 1/4 W Function Subscriber loop interface circuit (SLIC). Secondary protection. Switches ringing signals. First-generation codec. Protection resistor. Protection resistor. VBAT filter capacitor. VCC filter. With CF2, improves idle channel noise. With CF1, improves idle channel noise. Sets dc loop current limit. ac/dc separation capacitor. Loop stability. With RGP and RRCV, sets ac termination impedance. With RGP and RT1, sets receive gain. With RT1 and RRCV, sets ac termination impedance and receive gain. Loop stability. With RX, sets transmit gain in codec. With RT2, sets transmit gain in codec. Sets hybrid balance. Sets loop closure (off-hook) threshold. Ringing source series resistor. With CRTS2, forms first pole of a double pole, 2 Hz ring trip sense filter. With RTSN, RTSP, forms second 2 Hz filter pole. With RTS2, forms first 2 Hz filter pole. With CRTS1, RTSP, forms second 2 Hz filter pole. With CRTS1, RTSN, forms second 2 Hz filter pole. Provides 60 Hz filtering for ring ground detection. Digital output pull-up resistor. Sets ring ground detection threshold.
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L7554 Low-Power SLIC
Data Sheet March 1997
Applications (continued)
Design Considerations
Table 11 shows the design parameters of the application circuit shown in Figure 11. Components that are adjusted to program these values are also shown. Table 11. 600 Design Parameters Design Parameter Loop Closure Threshold dc Loop Current Limit dc Feed Resistance 2-wire Signal Overload Level ac Termination Impedance Hybrid Balance Line Impedance Transmit Gain Receive Gain Parameter Value 10 mA 40 mA 183 3.14 dBm 600 600 0 dB 0 dB Components Adjusted RLCTH RPROG RPT, RPR -- RT1, RGP, RRCV RHB1 RT2, RX RRCV, RGP, RT1
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Lucent Technologies Inc.
Data Sheet March 1997
L7554 Low-Power SLIC
Applications (continued)
Characteristic Curves
0
0 RECEIVE GAIN -10
-10 -20
PSRR (dB)
-30 -40 -50 -60 -70
CURRENT LIMIT SPEC.
(dB)
-20
-30 HYBRID BALANCE
BELOW CURRENT LIMIT
-40 -50 100
1000
104
105
-80 10 100 1000 104 105 106 FREQUENCY (Hz)
FREQUENCY (Hz)
12-2828 (C)
12-2830 (C)
Figure 13. 7551 Receive Gain and Hybrid Balance vs. Frequency
Figure 15. 7551 Typical VCC Power Supply Rejection
0
0 TRANSMIT GAIN -10
PSRR (dB)
-10 -20 -30 -40 -50 -60 -70
BELOW CURRENT LIMIT CURRENT LIMIT
(dB)
-20
SPECIFICATION RANGE
-30 RETURN LOSS -40 -50 100
-80
1000
104
105
10
100
1000
104
105
106
FREQUENCY (Hz)
12-2829 (C)
FREQUENCY (Hz)
12-2871 (C)
Figure 14. 7551 Transmit Gain and Return Loss vs. Frequency
Figure 16. 7551 Typical VBAT Power Supply Rejection
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L7554 Low-Power SLIC
Data Sheet March 1997
Applications (continued)
Characteristic Curves (continued)
OFF-HOOK THRESHOLD LOOP CURRENT (mA)
25
50
20
40
15
LOOP CURRENT (mA)
30
1 10 k
ILIM
10
20 -1 RDC1 10
5
0
0
10
20
30
40
50
60
0 0 10 20 30 40 50
LOOP CLOSURE THRESHOLD RESISTOR, RLCTH (k)
LOOP VOLTAGE (V)
Note: VBAT = -48 V.
12-3015 (C)
Note: VBAT = -48 V; ILIM = 22 mA; RDC1 = 113 .
12-3050 (C)
Figure 17. Loop Closure Program Resistor Selection
Figure 19. Loop Current vs. Loop Voltage
2000
50
40
1500
300 cu. ft./ min. 36 C/W 1000 STILL AIR 47 C/W 500
LOOP CURRENT (mA)
POWER (mW)
30
20
10
0
0
20 40 60 80 100 120 140 160 180
0
500
1000
1500
2000
AMBIENT TEMPERATURE, TA (C)
LOOP RESISTANCE, RLOOP ()
Note: Tip lead is open; VBAT = -48 V.
12-3016 (C)
Note: VBAT = -48 V; ILIM = 22 mA; RDC1 = 113 .
12-3051 (C)
Figure 18. Ring Ground Detection Programming
Figure 20. Loop Current vs. Loop Resistance
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Data Sheet March 1997
L7554 Low-Power SLIC
Applications (continued)
Characteristic Curves (continued)
1500
PROTECTION RESISTOR MISMATCH (%)
8 7 6
49 dB, RP MATCHED TO 1.5
SLIC POWER DISSIPATION (mW)
1000
5 4 3 2 1 0 0
58 dB, RP MATCHED TO 0.5
500
0 0 500 1000 1500 2000 LOOP RESISTANCE, RLOOP ()
20
40
60
80
100
120
PROTECTION RESISTOR VALUE ()
12-3019 (C)
Note: VBAT = -48 V; ILIM = 22 mA; RDC1 = 113 .
12-3052 (C)
Figure 23. Longitudinal Balance Resistor Mismatch Requirements
Figure 21. 7551 Typical SLIC Power Dissipation vs. Loop Resistance
60
2000
LONGITUDINAL BALANCE (dB)
55
1500 POWER (mW) 300 cu. ft./ min. 36 C/W 1000 STILL AIR 47 C/W 500
50
45
40 0.0
0.5
1.0
1.5
2.0
2.5
0 20
PROTECTION RESISTOR MISMATCH ()
40
60
80
100
120
140
160
180
12-3021 (C)
AMBIENT TEMPERATURE, TA (C)
12-2825 (C)
Figure 24. Longitudinal Balance vs. Protection Resistor Mismatch
Figure 22. Power Derating
Lucent Technologies Inc.
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L7554 Low-Power SLIC
Data Sheet March 1997
Starting from the on-hook condition and going through to a short circuit, the curve passes through two regions: Region 1; On-hook and low loop currents. The slope corresponds to the dc resistance of the SLIC, RDC1 (default is 113 typical). The open-circuit voltage is the battery voltage less the overhead voltage of the device, VOH (default is 6.5 V typical). These values are suitable for most applications, but can be adjusted if needed. For more information, see the sections entitled Adjusting dc Feed Resistance and Adjusting Overhead Voltage. Region 2; Current limit. The dc current is limited to a value determined by external resistor RPROG. This region of the dc template has a high resistance (10 k). Calculate the external resistor as follows: RPROG (k) = 1.67 ILIM (mA) Overhead Voltage In order to drive an on-hook ac signal, the SLIC must set up the Tip and Ring voltage to a value less than the battery voltage. The amount that the open loop voltage is decreased relative to the battery is referred to as the overhead voltage. Expressed as an equation, VOH = |VBAT| - (VPT - VPR) Without this buffer voltage, amplifier saturation will occur and the signal will be clipped. The 7551 is automatically set at the factory to allow undistorted on-hook transmission of a 3.17 dBm signal into a 900 loop impedance. For applications where higher signal levels are needed, e.g., periodic pulse metering, the 2-wire port of the SLIC can be programmed with pin DCR. The drive amplifiers are capable of 4 Vrms minimum (VAMP). Referring to Figure 26, the internal resistance has a worst-case value of 46 . So, the maximum signal the device can guarantee is: ZT/R VT/R = 4 V ---------------------------------------- ZT/R + 2 ( RP + 46 ) Thus, RP 35 allows 2.2 Vrms metering signals. The next step is to determine the amount of overhead voltage needed. The peak voltage at output of Tip and Ring amplifiers is related to the peak signal voltage by:
Applications (continued)
dc Applications
Battery Feed The dc feed characteristic can be described by: VT R =
( VBAT - VOH ) x RL ------------------------------------------RL + 2RP + Rdc IL =
----------------------------------
VBAT - VOH RL + 2RP + Rdc
where: IL = dc loop current. VT/R = dc loop voltage. |VBAT| = battery voltage magnitude. VOH = overhead voltage. This is the difference between the battery voltage and the open loop Tip/Ring voltage. RL = loop resistance, not including protection resistors. RP = protection resistor value. Rdc = SLIC internal dc feed resistance. The design begins by drawing the desired dc template. An example is shown in Figure 25.
50
40
LOOP CURRENT (mA)
30
1 10 k
ILIM
20 -1 RDC1 10
0 0 10 20 30 40 50
LOOP VOLTAGE (V)
Note: VBAT = -48 V; ILIM = 22 mA; RDC1 = 113 .
12-3050 (C)
Figure 25. Loop Current vs. Loop Voltage
vamp = vT/R 1 +
2 ( RP + 40 ) ----------------------------- ZT R
20
Lucent Technologies Inc.
Data Sheet March 1997
L7554 Low-Power SLIC
Accounting for VSAT tolerance of 0.5 V, a nominal overhead of 9.9 V would ensure transmission of an undistorted 2.2 V metering signal. Adjusting Overhead Voltage To adjust the open loop 2-wire voltage, pin DCR is programmed at the midpoint of a resistive divider from ground to either -5 V or VBAT. In the case of -5 V, the overhead voltage will be independent of the battery voltage. Figure 27 shows the equivalent input circuit to adjust the overhead.
Applications (continued)
dc Applications (continued)
RP + VT/R - RP [ZT/R]
ROC/2 + VAMP - ROC/2
R1
12-2563 (C)
25 k 30% DCR
Figure 26. SLIC 2-Wire Output Stage In addition to the required peak signal level, the SLIC needs about 2 V from each power supply to bias the amplifier circuitry. It can be thought of as an internal saturation voltage. Combining the saturation voltage and the peak signal level, the required overhead can be expressed as: 2 ( RP + 40 ) = VSAT + 1 + ----------------------------- vT R - ZT R VSAT + 1 +
R2
-5 V
12-2562 (C)
Figure 27. Equivalent Circuit for Adjusting the Overhead Voltage The overhead voltage is programmed by using the following equation: VOH = 6.5 - 4 VDCR R1 || 25 k = 6.5 - 4 - 5 x ------------------------------------- R2 + R1 || 25 k-
VOH
=
2 ( RP + 40 ) ----------------------------- ZT R
2 ZT R --------------- x 10 dBm 20 1000
where VSAT is the combined internal saturation voltage between the Tip/Ring amplifiers and VSAT (4.0 V typ.). RP () is the protection resistor value, and 40 is the output series resistance of each internal amplifier. ZT/R () is the ac loop impedance. Example 1, On-hook Transmission of a Meter Pulse: Signal level: 2.2 Vrms into 200 35 protection resistors ILOOP = 0 (on-hook transmission of the metering signal) 2 ( 35 + 40 ) VOH = 4.0 + 1 + --------------------------- 2 ( 2.2 ) 200
R1 || 25 k = 6.5 + 20 ------------------------------------- R2 + R1 || 25 k-
= 9.4 V
Lucent Technologies Inc.
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L7554 Low-Power SLIC
Data Sheet March 1997
This is an equivalent circuit for adjusting both the dc feed resistance and overhead voltage together. The adjustments can be made by the simple superposition of the overhead and dc feed equations: R1 || 25 k || R3 VOH = 6.5 + 20 --------------------------------------------- R2 + R1 || 25 k || R3 R1 || 25 k Rdc = 113 + 500 ---------------------------------- R3 + R1 || 25 k When selecting external components, select R1 on the order of 5 k to minimize the programming inaccuracy caused by the internal 25 k resistor. Lower values can be used; the only disadvantage is the power consumption of the external resistors. Loop Range
12-2560 (C)
Applications (continued)
dc Applications (continued)
Adjusting dc Feed Resistance The dc feed resistance may be adjusted with the help of Figure 28.
R1
25 k 30% DCR
R3
DCOUT
The equation below can be rearranged to provide the loop range for a required loop current: RL =
Figure 28. Equivalent Circuit for Adjusting the dc Feed Resistance VDCR Rdc = 113 + 500 -------------------VDCOUT R1 || 25 k = 113 + 500 --------------------------------- R3 + R1 || 25 k Adjusting Overhead Voltage and dc Feed Resistance Simultaneously The following paragraphs describe the independent setting of the overhead voltage and the dc feed resistance. If both need to be set to customized values, combine the two circuits as shown in Figure 29.
--------------------------- - 2RP - Rdc -
VBAT - VOH IL
Off-Hook Detection The loop closure comparator has built-in longitudinal rejection, eliminating the need for an external 60 Hz filter. This applies in both powerup and low-power scan states. The loop-closure detection threshold is set by resistor RLCTH. Referring to Figure 30, NLC is high in an on-hook condition (ITR = 0, VDCOUT = 0), and VLCTH = 0.05 mA x RLCTH. The off-hook comparator goes low when VLCTH crosses zero and then goes negative: VLCTH = 0.05 mA x RLCTH + VDCOUT = 0.05 x RLCTH - 0.125 V/mA x ITR RLCTH(k) = 2.5 x ITR(mA)
RP R1 ITR RL
PT + - PR -0.125 V/mA DCOUT RLCTH LCTH 0.05 mA + - NLC
25 k 30% DCR
R2 -5 V
R3 RP
DCOUT
12-2561 (C) 12-2553.a (C)
Figure 29. Adjusting Both Overhead Voltage and dc Feed Resistance 22
Figure 30. Off-Hook Detection Circuit Lucent Technologies Inc.
Data Sheet March 1997
L7554 Low-Power SLIC
The current IN is repeated as IP in the positive comparator input. The voltage at comparator input RTSP is: VRTSP
Applications (continued)
dc Applications (continued)
Ring Trip Detection The ring trip circuit is a comparator that has a special input section optimized for this application. The equivalent circuit is shown in Figure 31, along with its use in an application using unbalanced, battery-backed ringing.
PHONE HOOK SWITCH RLOOP RC PHONE RTS1 402 RTS2 274 k VRING VBAT RTSP 2 M CRTS2 0.27 F RTSN 2 M RTSN CRTS1 0.022 F - 15 k IP = IN IN + - 7V NRDET RTSP +
= VBAT + ILOOP ( dc ) x RTS1 + IP x RTSP
Using this equation and the values in the example, the voltage at input RTSP is -12 V during ringing injection (ILOOP(dc) = 0). Input RTSP is, therefore, at a level of 5 V below RTSN. When enough dc loop current flows through RTS1 to raise its dc drop to 5 V, the comparator will trip. In this example, 5V ILOOP ( dc ) = ---------------402 = 12.5 mA
Ring Ground Detection
12-3014 (C)
Figure 31. Ring Trip Equivalent Circuit and Equivalent Application The comparator input voltage compliance is VCC to VBAT, and the maximum current is 240 A in either direction. Its application is straightforward. A resistance (RTSN + RTS2) in series with the RTSN input establishes a current that is repeated in the RTSP input. A slightly lower resistance (RTSP) is placed in series with the RTSP input. When ringing is being injected, no dc current flows through RTS1, so the RTSP input is at a lower potential than RTSN. When enough dc loop current flows, the RTSP input voltage increases to trip the comparator. In Figure 31, a low-pass filter with a double pole at 2 Hz was implemented to prevent false ring trip. The following example illustrates how the detection circuit of Figure 31 will trip at 12.5 mA dc loop current using a -48 V battery. -7 - (-48) IN = -------------------------2.289 k = 17.9 A
Pin ICM sinks a current proportional to the longitudinal loop current. It is also connected to an internal comparator whose output is pin RGDET. In a ground start application where Tip is open, the ring ground current is half differential and half common mode. In this case, to set the ring ground current threshold, connect a resistor RICM from pin ICM to VCC. Select the resistor according to the following relation: RICM ( k ) = VCC x 120 --------------------IRG ( mA )
The above equation is shown graphically in Figure 18. It applies for the case of Tip open. The more general equation can be used in ground key application to detect a common-mode current ICM: RICM ( k ) = VCC x 60 ------------------ICM ( mA )
Lucent Technologies Inc.
23
L7554 Low-Power SLIC
Data Sheet March 1997
Second-Generation Codecs This class of devices includes a microprocessor interface for software control of the gains and hybrid balance. The hybrid balance is included in the device. ac programmability adds application flexibility and saves several passive components and also adds several I/O latches that are needed in the application. However, there is no transmit op amp, since the transmit gain and hybrid balance are set internally. Third-Generation Codecs This class of devices includes the gains, termination impedance, and hybrid balance--all under microprocessor control. Depending on the device, it may or may not include latches. Selection Criteria In the codec selection, increasing software control and flexibility are traded for device cost. To help decide, it may be useful to consider the following. Will the application require only one value for each gain and impedance? Will the board be used in different countries with different requirements? Will several versions of the board be built? If so, will one version of the board be most of the production volume? Does the application need only real termination impedance? Does the hybrid balance need to be adjusted in the field? In the following examples, use of a first-generation codec is shown. The equations for second- and third-generation codecs are simply subsets of these. There are two examples: The first shows the simplest circuit, which uses a minimum number of discrete components to synthesize a real termination impedance. The second example shows the use of the uncommitted op amp to synthesize a complex termination. The design has been automated in a DOS-based program, available on request.
Applications (continued)
ac Design
There are four key ac design parameters. Termination impedance is the impedance looking into the 2-wire port of the line card. It is set to match the impedance of the telephone loop in order to minimize echo return to the telephone set. Transmit gain is measured from the 2-wire port to the PCM highway, while receive gain is done from the PCM highway to the transmit port. Finally, the hybrid balance network cancels the unwanted amount of the receive signal that appears at the transmit port. At this point in the design, the codec needs to be selected. The discrete network between the SLIC and the codec can then be designed. The following is a brief codec feature and selection summary. First-Generation Codecs These perform the basic filtering, A/D (transmit), D/A (receive), and -law/A-law companding. They all have an op amp in front of the A/D converter for transmit gain setting and hybrid balance (cancellation at the summing node). Depending on the type, some have differential analog input stages, differential analog output stages, and -law/A-law selectability. This generation of codecs have the lowest cost. They are most suitable for applications with fixed gains, termination impedance, and hybrid balance.
24
Lucent Technologies Inc.
Data Sheet March 1997
L7554 Low-Power SLIC
Applications (continued)
ac Design (continued)
ac equivalent circuits using a T7513 Codec are shown in Figures 32 and 33.
RX VGSX
- +
ZT/R RP PT 40 AV = 1 VS + ZT VT/R - RP PR 40 AV = -1 IT/R
-0.4 V/mA VITR
RT2
VFXIN VFXIP
- +
-
AV = 4
RCVN RCVP
RT1 RHB1 RRCV
+
VFR (PWROP)
RG
L7554 SLIC ATT7564 SLIC
T7513 CODEC
12-2554.a (C)
Figure 32. ac Equivalent Circuit Not Including Spare Op Amp
ZT5
RX VGSX
- +
ZT/R RP PT 40 AV = 1 VS + ZT VT/R - RP PR 40 AV = -1 IT/R
-0.4 V/mA VITR
RT4 SN AGND RCVN RCVP
- +
XMT
RT6
VFXIN VFXIP
- +
RT3
-
AV = 4
RHB1 RRCV VFR
+
(PWROP) RGN
L7554 SLIC
T7513 CODEC
12-3013 (C)
Figure 33. ac Equivalent Circuit Including Spare Op Amp
Lucent Technologies Inc.
25
L7554 Low-Power SLIC
Data Sheet March 1997
Example 2, Complex Termination: For complex termination, the spare op amp is used (see Figure 33). 3200 ZT5 zt = 2RP + 80 + ---------------------------------- ( --------- ) RT3 RT4 RT3 1 + -------- + ----------RGN RRCV = 2RP + 80 + k ( ZT5 ) 8 grcv = ---------------------------------------------------------------------------RRCV RRCV zt RX 1 + ------------- + ------------- 1 + ---------- RHB = ------------------- RT3 ZT/R gtx x grcvRGN
Applications (continued)
ac Design (continued)
Example 1, Real Termination The following design equations refer to the circuit in Figure 32. Use these to synthesize real termination impedance. Termination Impedance: zt =
vT R --------- itr
3200 zt = 2RP + 80 + ---------------------------------RT1 RT1 1 + -------- + ----------RGP RRCV Receive Gain: grcv =
- R X 400 ZT5 gtx = ---------- x ---------- x --------RT6 ZT/R RT4
The hybrid balance equation is the same as in Example 1.
vT R --------vfr
grcv =
------------------------------------------------------------------RRCV zt 1 + ----------- + RRCV 1 + --------- ----------- -
RT1 RGP ZT R
8
PCB Layout Information
Make the leads to BGND and VBAT as wide as possible for thermal and electrical reasons. Also, maximize the amount of PCB copper in the area of--and specifically on--the leads connected to this device for the lowest operating temperature. When powering the device, ensure that no external potential creates a voltage on any pin of the device that exceeds the device ratings. In this application, some of the conditions that cause such potentials during powerup are the following: 1) an inductor connected to PT and PR (this can force an overvoltage on VBAT through the protection devices if the VBAT connection chatters) and 2) inductance in the VBAT lead (this could resonate with the VBAT filter capacitor to cause a destructive overvoltage). This device is normally used on a circuit card that is subjected to hot plug-in, meaning the card is plugged into a biased backplane connector. In order to prevent damage to the IC, all ground connections must be applied before, and removed after, all other connections.
Transmit Gain:
gtx =
--------vT R
vgsx
gtx =
RX RT2
------- x ---------
400 ZT R
Hybrid Balance: Vgsx hbal = 20log ------------ Vfr To optimize the hybrid balance, the sum of the currents at the VFX input of the codec op amp should be set to 0. The following expressions assume that the test network is the same as the termination impedance. RX hbal = 20 log ------- RHB
- gtx x grcv
26
Lucent Technologies Inc.
Data Sheet March 1997
L7554 Low-Power SLIC
Outline Diagram
44-Pin PLCC
Controlling dimensions are in millimeters.
17.65 MAX 16.66 MAX PIN #1 IDENTIFIER ZONE
6
1
40
7
39
16.66 MAX 17.65 MAX
17
29
18
28
4.57 MAX SEATING PLANE 1.27 TYP 0.53 MAX 0.51 MIN TYP 0.10
5-2506r7 (C)
Lucent Technologies Inc.
27
L7554 Low-Power SLIC
Data Sheet March 1997
Ordering Information
Device Part No. ATTL7554AP ATTL7554AP-TR* ATTL7554BP ATTL7554BP-TR* Description Low-Power SLIC, -60 V Low-Power SLIC, -60 V Low-Power SLIC, -72 V Low-Power SLIC, -72 V Package 44-Pin PLCC 44-Pin PLCC (Tape and Reel) 44-Pin PLCC 44-Pin PLCC (Tape and Reel) Comcode 107080921 107177172 107548927 107548943
*Devices on tape and reel must be ordered in 1000-piece increments.
For additional information, contact your Microelectronics Group Account Manager or the following: INTERNET: http://www.lucent.com/micro U.S.A.: Microelectronics Group, Lucent Technologies Inc., 555 Union Boulevard, Room 30L-15P-BA, Allentown, PA 18103 1-800-372-2447, FAX 610-712-4106 (In CANADA: 1-800-553-2448, FAX 610-712-4106), e-mail docmaster@micro.lucent.com ASIA PACIFIC: Microelectronics Group, Lucent Technologies Singapore Pte. Ltd., 77 Science Park Drive, #03-18 Cintech III, Singapore 118256 Tel. (65) 778 8833, FAX (65) 777 7495 JAPAN: Microelectronics Group, Lucent Technologies Japan Ltd., 7-18, Higashi-Gotanda 2-chome, Shinagawa-ku, Tokyo 141, Japan Tel. (81) 3 5421 1600, FAX (81) 3 5421 1700 For data requests in Europe: MICROELECTRONICS GROUP DATALINE: Tel. (44) 1734 324 299, FAX (44) 1734 328 148 For technical inquiries in Europe: CENTRAL EUROPE: (49) 89 95086 0 (Munich), NORTHERN EUROPE: (44) 1344 865 900 (Bracknell UK), FRANCE: (33) 1 41 45 77 00 (Paris), SOUTHERN EUROPE: (39) 2 6601 1800 (Milan) or (34) 1 807 1700 (Madrid)
Lucent Technologies Inc. reserves the right to make changes to the product(s) or information contained herein without notice. No liability is assumed as a result of their use or application. No rights under any patent accompany the sale of any such product(s) or information.
Copyright (c) 1997 Lucent Technologies Inc. All Rights Reserved Printed in U.S.A.
March 1997 DS97-202ALC (Replaces DS96-229LCAS)
Printed On Recycled Paper

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